Variable length decoder and method for decoding two codes per clock cycle
US5841380A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 1996 |
| Grant date | Nov 24, 1998 |
| Priority date | — |
| Expiry date | Mar 29, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/70
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Apparatus and method for determining the lengths of a plurality of variable length encoded data values included in a data stream within a single clock cycle. The apparatus includes a shifter for receiving the data stream. The shifter is responsive to a shift control signal for transmitting a subset of the plurality of variable length encoded data values. A first length decoding mechanism is coupled to receive the subset of the plurality of encoded data values. The first length decoding mechanism performs a first decoding operation to determine the length of a first one of the encoded data values in the subset. A second length decoding mechanism is also coupled to receive the subset of the plurality of encoded data values. The second length decoding mechanism performs a second decoding operation to individually determine the length of a second one of the encoded data values in the subset. The second encoded data value immediately follows the first encoded data value in the subset. The first and second decoding operations are performed simultaneously. A combined length decoder is responsive to the lengths of the first and second encoded data values for outputting a combined length of…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.