Method and apparatus for optimizing an oscillator start up time
US5844448A · kind A · utility
19Cited by
5References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 12, 1997 |
| Grant date | Dec 1, 1998 |
| Priority date | — |
| Expiry date | Sep 12, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03B2200/004
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An oscillator circuit (10) having an optimized start up time includes an inverting amplifier (12) coupled in parallel to a crystal (14), a first bank of capacitors (16) coupled to the crystal, and a second bank of capacitors (20) switchably coupled (18) in parallel to the frequency resonant network, wherein the second bank of capacitors has a higher capacitance load than the first bank of capacitors. The oscillator circuit may also include a processor (62) for controlling when the second bank of capacitors gets switched and coupled to the crystal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.