Single chip data processing apparatus having a flash memory which is rewritable under the control of built-in CPU in the external write mode
US5844843A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Sep 30, 1997 |
| Grant date | Dec 1, 1998 |
| Priority date | — |
| Expiry date | Sep 30, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A single chip data processing apparatus having a central processing unit (CPU) and a flash memory constituted by electrically rewritable nonvolatile memory cells. The flash memory can be written with data under the control of the built-in CPU in an external write operation mode of the apparatus and, also, the CPU executes a data processing operation in accordance with a data processing program in a normal operation mode. In the external write operation mode, the CPU decodes a command by executing a command analyzing program so as to determine a process to be performed to the flash memory. Based on the decoding result of the command, the CPU executes a control program for performing the process to the flash memory, which process can be changing threshold voltages of selected nonvolatile memory cells of the flash memory to predetermined threshold voltages or verifying whether or not the threshold voltages of selected ones of the nonvolatile memory cells of the flash memory have been changed to predetermined threshold voltages. The data processing apparatus also has a built-in command latch circuit, an address latch circuit as well as a data latch circuit such that the CPU reads the c…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.