Cell-based clock recovery device
US5844891A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 19, 1997 |
| Grant date | Dec 1, 1998 |
| Priority date | — |
| Expiry date | Feb 19, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5681
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A clock recovery unit provides a clock recovery function in the receiving entity of a system to implement adaptation of constant bit-rate (CBR) services over an asynchronous transfer mode (ATM) or ATM-like network. Incoming cells are periodically sampled for buffer fill level L.sub.i. The maximum fill level of undelayed cells Lx.sub.j is extracted from successive series of a predetermined whole number M of buffer-fill samples L.sub.i. A frequency adjustment logic unit provides at its output a bit stream at a given clock frequency f.sub.j. The frequency adjustment logic unit makes incremental adjustments to the clock frequency f.sub.j tending to cause the steady state mean of the fill level Lx.sub.j, or its derivative, to move toward zero.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.