Method and apparatus for controlling the wakeup logic of a radio receiver in sleep mode
US5845204A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 1995 |
| Grant date | Dec 1, 1998 |
| Priority date | — |
| Expiry date | Aug 11, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A low-power stop mode "snooze" timer is implemented in the processing unit of a communication system, which runs without the use of the usual crystal-controlled oscillator. The "snooze" timer is implemented by a second oscillator with associated timer circuit. The second oscillator runs continually and feeds a timer which is loaded with a suitable value. The timer, when timed out or expired, will reactivate the main processing functions, thus allowing the successful reception of an external signal from a remote transmission source. To compensate for the inaccuracy of the second oscillator due to its dependence upon voltage, process and temperature, the snooze timer's output is calibrated during the wake-up periods against a timing signal derived from the internal crystal-controlled timing source. This calibration compensates for the inherent frequency instability of the second oscillator and allows a timing signal of sufficient accuracy to be maintained over the stop cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.