Multi-layered printed circuit board, and grid array package adopting the same
US5847451A · kind A · utility
26Cited by
9References
26Claims
0Family size
Inventors
Key dates
| Filing date | Sep 25, 1996 |
| Grant date | Dec 8, 1998 |
| Priority date | — |
| Expiry date | Sep 25, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/924
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a multi-layered printed circuit board on which an LSI having a plurality of power supply pins and a plurality of signal pins is mounted, and a grid array package which adopts the printed circuit board, some or all of the plurality of power supply pins are connected to a power supply pattern via an inductance pattern, thereby reducing generation of radiation noise.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.