Patent · US Expired

Power converter stabilization loop

US5847549A · kind A · utility

166Cited by
17References
7Claims
0Family size

Assignee

Inventor

Key dates

Filing dateAug 13, 1997
Grant dateDec 8, 1998
Priority date
Expiry dateAug 13, 2017

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10S323/901
  • WIPO fieldElectrical machinery, apparatus, energy
  • WIPO sectorElectrical engineering

Abstract

The invention provides a stabilized power converter having an input voltage and an output voltage, where the stabilized converter operates similar to a conventional converter under normal conditions, and operates continuously at the maximum power transfer point during overload conditions. The stabilized converter comprises a voltage control loop for regulating output voltage, and a stabilization loop for regulating input voltage. In a preferred embodiment, the stabilization loop senses the input voltage to the stabilized converter and compares it to a reference voltage. Whenever converter input voltage is above the maximum power transfer voltage, no action is taken by the stabilization loop, and the converter operates in the conventional manner. As converter input voltage approaches the maximum power transfer voltage, converter output voltage and corresponding converter input and output power are reduced to compensate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.