Voltage booster with pulsed initial charging and delayed capacitive boost using charge-pumped delay line
US5847946A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 15, 1997 |
| Grant date | Dec 8, 1998 |
| Priority date | — |
| Expiry date | Dec 15, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/063
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A bus switch is constructed from an n-channel transistor. The gate terminal of the n-channel transistor is boosted above the power supply (Vcc) to increase current drive and reduce the channel resistance of the bus switch. The gate terminal is connected to a boosted node. When the bus switch is turned on, a pulse is generated to drive the boosted node from ground to Vcc. The boosted node is also an input of a delay line. After a delay through the delay line, the pulsed pull-up is turned off. Feeding the boosted node to the delay line allows the pulse to be self-timed. The delay line then drives the back-side of a capacitor from ground to Vcc. This voltage swing is coupled through the capacitor to the boosted node, driving the boosted node about 1.3 volts above Vcc. A small keeper transistor supplies a small current to the boosted node to counteract any leakage. This leaker transistor is connected to a charge pump, and the delay line that enables this keeper transistor is also connected to the charge pump. A precise sequence of events boosts the gate voltage of the bus switch above Vcc without drawing large currents from the charge pump.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.