Method and apparatus for controlling a memory device in a page mode
US5848025A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 1997 |
| Grant date | Dec 8, 1998 |
| Priority date | — |
| Expiry date | Jun 30, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method (600, 700) and apparatus (402) for controlling a memory device, such as a synchronous dynamic random access memory (404), includes a user-programmable register containing a new parameter, PRECHARGE DELAY TIME. A memory controller (402) uses the parameter to set a minimum limit through which each page is kept open after an initial access. Subsequent access to the same page cause the controller to reset the limit, thereby extending the open page. Accesses to different pages, refresh operations, and maximum row address strobe parameters can force the page closed. A user can tune the PRECHARGE DELAY TIME to keep pages open through the time period in which it is likely that additional accesses will be to the same page. Conversely, open pages can be closed after that time period is exceeded. In both cases, the memory device will be ready for a subsequent access with minimum latency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.