Peripheral component interconnect gateway controller
US5848252A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 1996 |
| Grant date | Dec 8, 1998 |
| Priority date | — |
| Expiry date | Nov 5, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4027
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A gateway controller (100) for facilitating the exchange of information between PCI busses (101,103). The controller (100) may comprise a single printed wiring board (301) or two printed wiring boards (201,203) connected by cable (205). Busses (101, 103) are physically isolated from one another for security or other reasons. This technique provides for controlled communication capability which does not require direct linking of two subsystem buses. This technique also provides for a method of transparent communication between subsystems. This gateway controller (100) allows data control while providing bus security and physical isolation of communication buses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.