Simulating digital systems by using vector processing
US5848262A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 17, 1996 |
| Grant date | Dec 8, 1998 |
| Priority date | — |
| Expiry date | Jun 17, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The inventive software device simulates the cycles of a digital device on a computer system. The inventive simulator allows model bits to be computed in parallel and provides improved time-to-solution performance. The simulator uses words and bit-wise operations of the computer as vector processors. The simulator creates abstract representations having inputs and outputs for each component within the digital device. The simulator sorts the abstract representations to form groups of identical representations. Then, the simulator sequentially assigns each output of each representation in the group to one or more output words for that group. The concatenation of the output words for all groups is the output vector for the simulation. Next, the simulator maps each output bit to one or more offsets in an input vector for the simulation. Then, the simulator generates CPU instructions for each group that perform the bit calculations done by the represented component. The CPU instructions operate on the bits in the input vector to produce output bits stored in the output vector loop for each representation in the group. Finally, the simulator copies the bits from the output vector to the b…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.