Serial interrrupt control system in a system in which a plurality of interrupt requesters are connected to a serial bus
US5848278A · kind A · utility
32Cited by
11References
41Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 25, 1996 |
| Grant date | Dec 8, 1998 |
| Priority date | — |
| Expiry date | Sep 25, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an interrupt control system to be applied, especially, to a laptop or notebook type personal computer that can use an expansion unit, an interrupt encoder converts the leading edges of a plurality of interrupt signals into serial data and transfers the serial data to an interrupt decoder. The interrupt decoder converts the serial data into original parallel interrupt signals, and outputs these signals to a programmable interrupt controller. A bridge circuit generates an idle cycle of a secondary bus by detecting the idle cycle of a primary bus, and generates latch pulses for interrupt serial data of the secondary bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.