Control apparatus for maintaining order and accomplishing priority promotion in a computer interconnect
US5848297A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 1991 |
| Grant date | Dec 8, 1998 |
| Priority date | — |
| Expiry date | Dec 30, 2011 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/30
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A circuit for maintaining the order of transmission of information in a computer interconnect including control circuitry for sending a signal from a source of data to a destination for data indicating that data is ready for transfer, the control circuitry comprising a plurality of buffers for storing information relating to the data, the information including information regarding the order in which the information was received by the control circuitry, means for incrementing the information regarding the order in which the information was received by the control circuitry, and apparatus for sending the information relating to the data to the destination for data in the order of receipt by the control circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.