Tray for integrated circuits
US5848703A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 20, 1997 |
| Grant date | Dec 15, 1998 |
| Priority date | — |
| Expiry date | Oct 20, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67336
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A tray for storage and transportation of multiple staggered integrated circuit components, each having a planar housing and plurality of terminal pins arranged in spaced rows. The tray has a framework for supporting upstanding ribs that interfit between adjacent integrated circuit components. Each upstanding rib lies along an axis in one of two sets of intersecting axes and aligns with and fits between certain spaced rows to position the terminal pin in precise alignment with the tray. The rib axes are intersecting and oblique to the general tray orientation. Positioning fingers provide initial positioning to align the terminal pins and ribs. Pedestals define a support plane and support the integrated circuit with the terminal pins spaced from a base plate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.