Patent · US Expired

Multistage interconnection network and parallel computer using the same

US5852407A · kind A · utility

28Cited by
14References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 14, 1996
Grant dateDec 22, 1998
Priority date
Expiry dateJun 14, 2016

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F15/17393
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A multistage interconnection network capable of performing highly reliable communications with less hardware. In the multistage interconnection network for interconnecting a plurality of nodes, the first and final stages each have switches two times as large as the number of switches at an intermediate stage. Two output ports of each node are connected to the input ports of different first stage switches, and two input ports are connected to the output ports of final stage different switches. The input ports of switches of the intermediate stage are connected to the output ports of first stage different switches, and the output ports are connected to the input ports of final stage different switches. At least one output port of each switch at the first stage is directly connected to at least one input port of an optional switch at the final stage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.