Addressing mechanism for multiple look-up tables
US5852607A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 26, 1997 |
| Grant date | Dec 22, 1998 |
| Priority date | — |
| Expiry date | Feb 26, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/354
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A hash table addressing mechanism enters multiple, overlaid look-up tables with a hash table address that corresponds to an X-bit index J that includes both bits associated with a V-bit identifier that selects the appropriate overlaid table, and a Y-bit identifier that hashes to an X-bit index I that selects the appropriate location within the selected table. The table includes hash bins with locations that contain Y-bit identifiers that map under the hash function to the same index I. For each addressed location the system compares the stored identifier with only the Y-bit identifier used to produce the index I, to determine which of the table locations is associated with both the Y-bit identifier and the V-bit identifier that were used to produce the hash table address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.