Serial multi-GB/s data receiver
US5852637A · kind A · utility
21Cited by
5References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 7, 1995 |
| Grant date | Dec 22, 1998 |
| Priority date | — |
| Expiry date | Dec 7, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/02337
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A data pulse receiver for detecting and amplifying serial data pulses received at gigabit-per-second rates over a transmission medium through which the signal levels have been substantially attenuated. The receiver, in a preferred embodiment, has grounded base differential amplifiers to give impedance matching, signal amplification and wide frequency bandwidth. A regenerative flip-flop with programmable tail current provides hysteresis in order to suppress unwanted noise signals. The flip-flop also returns the data pulses to NRZ format. The receiver may also include means for automatic adjustment of the hysteresis level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.