Process for fabricating nonvolatile semiconductor memory device having a ferroelectric capacitor
US5854104A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 1997 |
| Grant date | Dec 29, 1998 |
| Priority date | — |
| Expiry date | Jan 30, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/692
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A process for fabricating a nonvolatile semiconductor memory device has one transistor and one ferroelectric capacitor electrically connected to each other by a contact plug, which comprising forming a transistor; forming an inter-layer insulating film, at least an upper surface portion thereof being a titanium oxide film; forming a capacitor lower electrode; and forming a capacitor insulating film and a capacitor upper electrode, wherein the lower electrode forming step comprises: depositing a titanium nitride film and a platinum film on the titanium oxide film; etching the platinum film with a first etching gas adapted to suppress deposition of substances including platinum; and etching the titanium nitride film with a second etching gas having a high etching selectivity to the titanium oxide film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.