Cache memory array which stores two-way set associative data
US5854761A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 1997 |
| Grant date | Dec 29, 1998 |
| Priority date | — |
| Expiry date | Jun 26, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1042
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cache memory array stores two-way set associative data. An odd set data bank stores odd number sets of the two-way set associative data, where the two ways of each odd number set are aligned horizontally within the odd set data bank. An even set data bank stores even number sets of the two-way set associative data, where the two ways of each even number set are aligned horizontally within the even set data bank. Also, the odd set data bank is aligned horizontally with the even set data bank such that each odd number set is aligned horizontally with a next even number set. The horizontally aligned ways are interleaved for data path width reduction. Set and way selection circuits extract lines of data from the array. The array may be structurally implemented by single-ported RAM cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.