Semiconductor memory device and method of manufacturing the same
US5859459A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 2, 1997 |
| Grant date | Jan 12, 1999 |
| Priority date | — |
| Expiry date | Apr 2, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
Abstract
A semiconductor device comprising: a substrate, a gate insulating layer formed on the substrate, insulating isolation layers formed on each side of the gate insulating layer, an impurity diffusion region formed in the substrate beneath the insulating isolation layer, a first conductive layer formed on both the gate insulating layer and the insulating isolation layer, and an element splitting trench which split up at least the insulating isolation layer and the impurity diffusion layer into two parts respectively and form a trench in the substrate and is buried with conductive material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.