Method and apparatus for the design of a circuit
US5859776A · kind A · utility
27Cited by
8References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 12, 1996 |
| Grant date | Jan 12, 1999 |
| Priority date | — |
| Expiry date | Aug 12, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In automated design, a useful insertion of a delay buffer or an increase in the delay time of the critical path could not been prevented. When inserting a logic element between two certain points on the circuit, substitution of other paths passing through the relevant insertion position is considered and the insertion position of the logic element is determined finally.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.