Non-hypercube interconnection subsystem having a subset of nodes interconnected using polygonal topology and other nodes connect to the nodes in the subset
US5859983A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 1996 |
| Grant date | Jan 12, 1999 |
| Priority date | — |
| Expiry date | Jul 1, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Interconnection subsystems having diverse topologies are disclosed for interconnecting small numbers of nodes having a predetermined maximum degree in a multiprocessor computer system. The interconnection subsystems are generally classified into three diverse classes of topologies, including a "polygonal" class, a "ladder" class and a "tiled" class. In topologies of the polygonal class, a majority of the nodes in the multiprocessor computer system are connected in a ring and the remaining nodes are connected to the nodes in the ring, and in some cases also to each other. In topologies of the ladder class, the nodes are interconnected in a "ladder" topology comprising a series of nodes connected in a ring, the ring corresponding to one standard of a ladder topology folded on itself. Each node in the ring is connected to another node in a second series, effectively forming rungs of the ladder topology. The nodes in the second series can be interconnected in a variety of arrangements, including a second ring, thereby effectively providing a second standard of the ladder topology. In topologies of the tiled class, the nodes are interconnected in tiled mesh-like topologies with six node…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.