Computer system having at least two boot sequences
US5860001A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 1997 |
| Grant date | Jan 12, 1999 |
| Priority date | — |
| Expiry date | May 19, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/441
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a computer system which can be powered on by at least a first and a second method wherein the first method is different from the second method. The computer system is operative to allow a user to select which one of at least two different pre-selected ordered lists of initial program load (IPL) devices are to be used depending on whether the system was powered on by the first method or the second method. The system includes a processor coupled to a local bus and an input/output (IO) bus. A non-volatile memory is coupled to the processor and the IO bus. The non-volatile memory has a basic input output system (BIOS) stored therein and the BIOS is effective for responding to the energization of the computer system by initiating a power on self test (POST). The non-volatile memory also stores a first pre-selected ordered list of IPL devices and a second pre-selected ordered list of IPL devices. The POST is operative to determine whether the system was powered on by the first power on method or the second power on method. If the first power on method was used, POST will attempt to boot from the first pre-selected ordered list of IPL devices and if the second power on method…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.