Method and apparatus using address and read head location information to provide optimal operation of a disk system
US5860103A · kind A · utility
32Cited by
6References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 16, 1997 |
| Grant date | Jan 12, 1999 |
| Priority date | — |
| Expiry date | Jun 16, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0674
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Minimal random disk write latency is achieved by limiting the number of logical address blocks that can be serviced by a disk to less that the actual number of physically addressable blocks of the system and having a disk controller dynamically map logical data blocks to physical disk blocks in such a fashion that each logical write can take place to any free location, where the free location can be chosen in any track of the current cylinder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.