Method and apparatus for enabling physical memory larger than corresponding virtual memory
US5860141A · kind A · utility
17Cited by
9References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 11, 1996 |
| Grant date | Jan 12, 1999 |
| Priority date | — |
| Expiry date | Dec 11, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0623
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for enabling a physical memory larger than a corresponding virtual memory. An apparatus is disclosed that includes a processor having an address word of a predefined length, a main memory having a size larger than the addressable range of the predefined address word, and virtual memory logic for configuring the processor virtual memory to contain a subset of the main memory as resident memory and pointers to the remainder of main memory. Analogous method steps are disclosed as is dividing main memory into a plurality of buffer uniquely identifiable within the address range of the predefined address word.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.