Method and apparatus for calculating effective memory addresses
US5860154A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 6, 1997 |
| Grant date | Jan 12, 1999 |
| Priority date | — |
| Expiry date | Jan 6, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3017
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A macro instruction is provided for a microprocessor which allows a programmer to specify a base value, index, scale factor and displacement value for calculating an effective address and returning that result in a single clock cycle. The macro instruction is converted into a micro operation which is provided to the single-cycle execution unit with the required source operands for performing the calculation. Within the single-cycle execution unit, the index and scale factor are provided to a left shifter for multiplying the two values. The result of the left shift operation is added to the sum of the base and displacement. This results in the effective address which is then returned from the single-cycle execution unit to a predetermined destination. This provides for the calculation of an effective address in a single cycle pipeline execution unit that is independent of the memory system execution units.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.