Circuit and method for regulating a voltage
US5861736A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 1, 1994 |
| Grant date | Jan 19, 1999 |
| Priority date | — |
| Expiry date | Dec 1, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/56
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A voltage regulator circuit (10) is provided. Regulator circuit (10) includes an amplifier (18) with an emitter follower output stage (26). Emitter follower stage (26) is coupled to a gate of a PMOS transistor (28). The source of transistor (28) is coupled to an input voltage at a power supply rail (12). Regulator (10) provides an output at node (14) at a drain of transistor (28). The output at node (14) is divided by resistors (30 and 34) and provided in a negative feedback loop to an input of amplifier (18). A reference voltage (22) is also provided to a second input of amplifier (18) such that the output at node (14) is a regulated voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.