Intermediate frequency (IF) sampling clock-to-clock auto-ranging analog-to-digital converter (ADC) and method
US5861831A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 1996 |
| Grant date | Jan 19, 1999 |
| Priority date | — |
| Expiry date | Dec 23, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/186
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A clock-to-clock auto-ranging ADC operates directly on an analog signal in the IF band or higher to track its gain range on a clock-to-clock basis and produce a digital signal that maintains high resolution of the analog signal without clipping or loss of signal sensitivity. This is accomplished by sampling an analog signal of sufficiently high frequency that a peak detector can accurately determine the maximum signal level over at least one-half a signal period and then reset the signal gain going into the ADC prior to the beginning of the next sampling period. This insures that the analog signal will always be within the range of the ADC. In accordance with the well known principles of sampling theory, the sampled analog signal is aliased into the frequency region between DC and one half the sampling frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.