Partitioned microelectronic device array
US5863708A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 1997 |
| Grant date | Jan 26, 1999 |
| Priority date | — |
| Expiry date | Jan 27, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T436/11
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method of making a dielectric substrate array for conducting a plurality of reactions in parallel in a number of wells, the method comprising: forming a first passage and a second passage each extending through a dielectric substrate, the substrate having a first surface and an opposing second surface; forming a plurality of channels on said first or second surface, including a first channel, a second channel, a third channel and a fourth channel on the substrate, wherein the first channel is on the first surface and intersects with the first passage, wherein the second channel is on the second surface and intersects with both of the first passage and the second passage, wherein the third channel is on the first surface and intersects with the second passage, wherein the fourth channel is on the first surface and is located between the outlets of the first and second passage at the first surface, and wherein (a) the connected first channel, first passage, second channel, second passage and third channel define a cross-over channel having dimensions suitable for promoting capillary action and (b) the fourth channel defines another channel having dimensions suitable for promoting c…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.