Process for fabricating SOI substrate
US5863829A · kind A · utility
30Cited by
5References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 13, 1996 |
| Grant date | Jan 26, 1999 |
| Priority date | — |
| Expiry date | Nov 13, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/977
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a process for fabricating an SOI substrate with no peripheral scratches and with enhanced fabrication efficiency. The present process includes bonding a semiconductor wafer of an active substrate 1 and a semiconductor base wafer 2 to form a bonded wafer 4; surface-grinding the active substrate 1; spin etching the surface-ground active substrate 1; and PACE processing the etched active substrate 1 to form the active substrate into a thin film and simultaneously, to remove the non-bonded peripheral portion of the bonded wafer 4.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.