System and method for improving convergence during modem training and reducing computational load during steady-state modem operations
US5864545A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 1996 |
| Grant date | Jan 26, 1999 |
| Priority date | — |
| Expiry date | Dec 6, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B3/235
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A phase-splitting T/3 equalizer and echo canceller structure is computationally efficient because only one point per baud is calculated. However, there are two drawbacks to the structure: (1) since the equalizer performs both the phase-splitting function and channel response equalization, its convergence is slow, and (2) when training the echo canceller during half-duplex training, an answering modem needs an assumed equalizer in its receive path to train its echo canceller, because the adaptive equalizer has not yet been trained; however, after equalizer training the echo canceller needs to be retrained because equalizer coefficients have changed. In contrast, a fixed phase splitting filter can be used during training. The echo canceller and equalizer are each trained with the fixed phase splitting filter thereby improving convergence performance, and after training, the equalizer is convolved with the fixed phase splitting filter to provide the combined phase splitting equalizer and the equalizer is convolved with the echo canceller to provide the combined echo canceller. In this way, computational load is small in steady state and convergence is fast during training. Even though…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.