Optimized environments for virtualizing physical subsystems independent of the operating system
US5864705A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 15, 1996 |
| Grant date | Jan 26, 1999 |
| Priority date | — |
| Expiry date | Aug 15, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/542
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computing system having a processor employs an accelerated virtual subsystem architecture which may reside in either the processor or chipset logic circuitry disposed on the motherboard. The accelerated virtualization process employs at least one phantom read register that provides logical status information in response to an I/O read operation or operations--avoiding engagement of the system management mode as fulfillment of the virtualization process. The at least one phantom read register is updated by the virtualization process and supplies the expected response to an application/driver program running on the processor responsive to the execution of an I/O read operation without invocation of an SMI. Preferably, at least one latch is further provided to buffer writes of indexes of index/data write pairs to further avoid engagement of the system management mode as fulfillment for the virtualization process. When the data write of the index/data pair write occurs, application/driver software retrieves the buffered index for use in the virtualization process to virtualize the appropriate behavior. Alternatively, multiple index/data write pairs may be gathered and acted on when a…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.