Single wire communication system
US5864872A · kind A · utility
33Cited by
37References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 28, 1996 |
| Grant date | Jan 26, 1999 |
| Priority date | — |
| Expiry date | May 28, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/41
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A communication circuit is provided in which reads from a device are controlled by sensing a transition by a host communicating with a device. The device then accepts a one which holds the line high for a predetermined time period or accepts a zero when the line is held high for a different time period. The sending of data is accomplished in a symmetrical relationship by having the device after the host pulls the line high by either by allowing the line to remain high or forcing the line to ground within the requisite time periods. This allows the "slave" device to consume almost no power in either the read or the write modes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.