Method for reducing shorts on a printed circuit board edge connector
US5865631A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 1997 |
| Grant date | Feb 2, 1999 |
| Priority date | — |
| Expiry date | Apr 10, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S439/951
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An edge connector for a circuit board having a top layer and at least one layer underlying the top layer to form a composite structure. The edge connector comprises a first set of metallic tabs formed on the top layer in a row spaced from an edge of the top layer, with each of the first set of metallic tabs having a plating spoke associated therewith formed in the one layer underlying the top layer. A second set of metallic tabs is formed on the top layer in a row adjacent the edge. A metallic tab of the first set is positioned between a pair of metallic tabs in the second set, however, the surface area of the top layer between each pair of metallic tabs in the second set is substantially free of a plating spoke.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.