Module tamper detection circuitry
US5867095A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 1997 |
| Grant date | Feb 2, 1999 |
| Priority date | — |
| Expiry date | Aug 15, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG08B29/043
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A detector tamper/trouble delay circuit incorporates a sensor which senses the presence or absence of a cover for the detector. When the cover is removed, the sensor triggers a delay element preset for predetermined time interval. If the cover is replaced during the time interval, no trouble or fault indicator is generated. If the cover remains off the detector for the entire time interval, a trouble or fault indicator will be generated. The indicator can be used by an alarm system control element or a stand alone trouble or fault indicator for producing a humanly perceptible representation of the existence of the fault or trouble condition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.