Method and system for the fractal compression of data using an integrated circuit for discrete cosine transform compression/decompression
US5867221A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 1996 |
| Grant date | Feb 2, 1999 |
| Priority date | — |
| Expiry date | Mar 29, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/99
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system and method for compressing related data sets of a sequence are disclosed. The process compares domain blocks from a current frame buffer to range blocks in a previous frame buffer or vector quantization ("VQ") tables to generate affine map codes. The affine map codes are preferably encoded by an entropy encoder before being transmitted to a remote site for decompression. The cost for the encoded affine map codes are computed and used to determine whether affine map codes for representing smaller blocks should be included in the affine map codes which represent the domain blocks into which the original frame was segmented. The methods are preferably implemented on a commercially available discrete cosine transform ("DCT") processor having a process controller and a data comparator. The results of the affine map code generating process on the DCT processor achieves a more consistent bit rate and image quality than methods operating the DCT processor to generate DCT codes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.