Inverse discrete cosine transform processor using parallel processing
US5867601A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 20, 1995 |
| Grant date | Feb 2, 1999 |
| Priority date | — |
| Expiry date | Oct 20, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/61
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An inverse discrete cosine transform processor for transforming a video signal from frequency domain signals into spatial domain signals. A bus converter receives DCT coefficient data from parallel processing paths and converts the DCT coefficient data to even and odd processing paths. Partial IDCT processors convert, in parallel, the coefficient data from the even and off processing paths to produce intermediate coefficient values by performing a one dimensional transform. The intermediate coefficient values are transposed in a transpose RAM to produce transposed intermediate coefficient values which are subsequently separated into even and odd processing paths and converted in parallel to produce pixel values by performing a one dimensional transform.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.