System and method for on-chip debug support and performance monitoring in a microprocessor
US5867644A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 10, 1996 |
| Grant date | Feb 2, 1999 |
| Priority date | — |
| Expiry date | Sep 10, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/364
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
User-configurable diagnostic hardware contained on-chip with a microprocessor for the purpose of debugging and monitoring the performance of the microprocessor. Method for using the same. A programmable state machine is coupled to on-chip and off-chip input sources. The state machine may be programmed to look for signal patterns presented by the input sources, and to respond to the occurrence of a defined pattern (or sequence of defined patterns) by driving certain control information onto a state machine output bus. On-chip devices coupled to the output bus take user-definable actions as dictated by the bus. The input sources include user-configurable comparators located within the functional blocks of the microprocessor. The comparators are coupled to storage elements within the microprocessor, and are configured to monitor nodes to determine whether the state of the nodes matches the data contained in the storage elements. By changing data in the storage elements, the programmer may change the information against which the state of the nodes is compared and also the method by which the comparison is made. The output devices include counters. Counter outputs may be used as state …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.