Method and apparatus for implementing a stop state for a processor in a multiprocessor system
US5867658A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 4, 1997 |
| Grant date | Feb 2, 1999 |
| Priority date | — |
| Expiry date | Apr 4, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/177
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One aspect of the invention relates to a method useful in a multiprocessor system for operating a processor. In one version of the invention, the method includes the steps of storing halt signature data in a register on the processor, the halt signature data being representative of whether the processor is in a halt state, storing start address data in memory which is accessible by the processor, executing an interruptible spin loop with the processor, and comparing the halt signature data with a predetermined halt signature to determine whether the processor is in a halt state when an interrupt is received and reading the start address data from memory to determine whether there is a request to start if the processor is in a halt state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.