Self-timed circuit having critical path timing detection
US5870404A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 8, 1996 |
| Grant date | Feb 9, 1999 |
| Priority date | — |
| Expiry date | Aug 8, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A self-timed circuit for use a clocked logic system is disclosed that comprises a timing detection device for detecting a timing margin of a critical path, the critical path being a path that limits the speed of the system. The circuit further comprises increase logic for increasing the speed of the system clock if the timing margin allows it, and decrease logic for decreasing the speed of the system clock if the timing margin indicates such a need. The increase and decrease logic comprise threshold generator and reset logic, and clock control logic.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.