Method and system for testing self-timed circuitry
US5870411A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 1996 |
| Grant date | Feb 9, 1999 |
| Priority date | — |
| Expiry date | Dec 13, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318544
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
From a first circuit, first information is output in response to acknowledgement signals. From a second circuit, second information and the acknowledgement signals are output. The second information and the acknowledgement signals are output in response to the second circuit receiving portions of the first information from the first circuit during a functional mode of operation. The portions and the acknowledgement signals are output asynchronously with respect to one another. From a third circuit, third information is output in response to the second information. From a test circuit, the second information output from the second circuit is specified, so that the third circuit outputs the third information in response to the specified second information independent of the first information output from the first circuit during a test mode of operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.