Decoder for compressed video signals
US5870497A · kind A · utility
38Cited by
7References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 28, 1992 |
| Grant date | Feb 9, 1999 |
| Priority date | — |
| Expiry date | May 28, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/426
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A decoder for compressed video signals comprises a central processing unit (CPU), a dynamic random access memory (DRAM) controller, a variable length code (VLC) decoder, a pixel filter and a video output unit. The microcoded CPU performs dequantization and inverse cosine transform using a pipelined data path, which includes both general purpose and special purpose hardware. In one embodiment, the VLC decoder is implemented as a table-driven state machine where the table contains both control information and decoded values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.