Systems, circuits and methods for mixed voltages and programmable voltage rails on integrated circuits
US5870617A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 1994 |
| Grant date | Feb 9, 1999 |
| Priority date | — |
| Expiry date | Dec 22, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (110) includes, on a single chip, distinct supply voltage terminals and internal on-chip supply conductors connected respectively thereto, including a ground terminal (GND) and terminals for first and second supply voltages (VCC3, VCC5), and a terminal for a selectable supply voltage (VCCDK) and also has a power-good terminal (PWRGOOD5). A plurality of peripheral control circuits (910, 938, 932) are connected by an on-chip internal bus (904). The peripheral control circuits (910, 938, 932) connect to different ones of the internal on-chip supply conductors for operation on the first and second supply voltages (VCC3, VCC5), and the selectable supply voltage (VCCDK). Reset circuitry (2390) is provided for at least one of the peripheral control circuits. A control latch (PMU.sub.-- CNTRL) has a bit (VCCDRV5V) to which the reset circuitry (2390) is responsive. The reset circuitry (2390) provides resets for the at least one of the peripheral control circuits (IDERST, FDDRST) as a function of a voltage at the power-good terminal (PWRGOOD5). Other devices, systems and methods are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.