Switched capacitor circuit adapted to store charge on a sampling capacitor related to a sample for an analog signal voltage and to subsequently transfer such stored charge
US5872469A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 5, 1996 |
| Grant date | Feb 16, 1999 |
| Priority date | — |
| Expiry date | Apr 5, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sampling capacitor interface circuit for storing charge on a sampling capacitor related to a sample of an input signal voltage during a charging phase and to transfer the stored charge to an output during a charge transfer phase, such input signal having bipolar voltages within a range above and below an input signal common mode voltage. The interface circuit includes a transistor having: an input electrode fed by the input signal; an output electrode coupled to the sampling capacitor; and, a control electrode. A controller is provided for producing a control signal having a first voltage during the charging phase and a second voltage during the charge transfer phase, such voltages being a unipolar voltage referenced to the input signal common mode voltage. A bias circuit is coupled to the input signal and has a level shifting capacitor coupled between the controller and the control electrode for storing a voltage during the charge transfer phase and for shifting the first voltage by the stored voltage during the charging phase to provide a voltage at the control electrode with a level sufficiently below the input signal common mode voltage to bias the transistor to a conducting …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.