Decoder circuitry with PRML signal processing for reproducing apparatus
US5872666A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 17, 1995 |
| Grant date | Feb 16, 1999 |
| Priority date | — |
| Expiry date | Nov 17, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B5/09
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Reproducing apparatus with an A/D (analog-to-digital) converter, which realizes high-accuracy data sampling, high-speed data transfer, low dissipation power and low cost. PR (partial response) processing is performed by receiving encoded signals, delaying the received signals on the basis of a reference clock, and adding the delayed signals and the received signals in analog signal form. The added signals are converted into digital values on the basis of the reference clock by the A/D converter, and Viterbi decoding is performed on the basis of the converted digital values. Owing to the PR processing which is performed at a stage preceding the A/D converter, a frequency band for the A/D conversion can be lowered, and hence, the high-accuracy data sampling is permitted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.