Linked list structures for multiple levels of control in an ATM switch
US5872769A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Jul 18, 1996 |
| Grant date | Feb 16, 1999 |
| Priority date | — |
| Expiry date | Jul 18, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S370/905
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A linked-list structure and method for use in an ATM network switch capable of adaptively providing highly efficient, and thus low cost, integrated services therein. The linked-list structure involves the creation of a list having pointers to a subsequent linked list as list entries. Within the subsequent linked list, each entry can be a pointer to a further linked list. The structure can be expanded to further levels of linked lists as required. Bandwidth distribution is thus achieved among list members at each level. The linked-list structure is employed in the present switch, which includes an input port processor, a bandwidth arbiter, and an output port processor, for switch bandwidth scheduling for both point-to-point, multipoint-to-point and point-to-multipoint cell transfers from the input port processor, and for output link scheduling at the output port processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.