High speed single chip digital video network apparatus
US5872784A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 1995 |
| Grant date | Feb 16, 1999 |
| Priority date | — |
| Expiry date | Mar 28, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q2213/13353
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A remote connection digital processing device with network capability includes on a single chip asynchronous transfer mode (ATM) network protocol processing system interconnection circuits and Motion Picture Experts Group (MPEG) decoder circuits. The ATM interconnection circuits include a physical-layer medium dependent (PMD) unit connected to an ATM network. A transmission convergence (TC)/Framer unit is connected to the PMD unit. An ATM segmentation and reassembly (SAR) unit is connected to the PMD unit. Packet conversion logic is coupled to the ATM SAR unit for converting ATM packets to MPEG format. The MPEG decompression decoder circuits include a demodulator decryption unit coupled to the packet conversion logic. A video decoder is coupled to the demodulator decryption unit. An audio decoder is coupled to the demodulator decryption circuit. A display is coupled to the video decoder. Audio output devices are coupled to the audio decoder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.