Method and apparatus for memory sequencing
US5872822A · kind A · utility
79Cited by
8References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 26, 1995 |
| Grant date | Feb 16, 1999 |
| Priority date | — |
| Expiry date | Oct 26, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for delaying frames received asynchronously from a fiber channel port until receive memory is properly sequenced for storing the delayed frames in which a circular buffer is positioned on the data path between the fiber channel port and the receive memory for delaying the frames in accordance with control signals generated by a sequencer having knowledge of the receive memory sequence count.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.