Semiconductor memory device with three-dimensional cluster distribution
US5874761A · kind A · utility
7Cited by
3References
1Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 15, 1992 |
| Grant date | Feb 23, 1999 |
| Priority date | — |
| Expiry date | Oct 15, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/68
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method of producing a semiconductor memory device forms an overlap between a distribution of semiconductor clusters in a gate insulating layer and a drain region by oblique ion implantation using the edge of the semiconductor cluster distribution as a self-align mask. At least a portion of the semiconductor cluster distribution which is the nearest to the Si substrate and the drain overlaps a drain diffusion layer, and the semiconductor clusters are overlapped with each other. Thus, the device has a 1Tr/cell structure. As a result, the properties of a nonvolatile memory device using an insulating film are improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.