Method and apparatus for frequency generation in a synchronous system
US5874846A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 17, 1997 |
| Grant date | Feb 23, 1999 |
| Priority date | — |
| Expiry date | Jan 17, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03B28/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system is provided for generating an accurate and stable output clock signal of a desired output frequency in response to a system clock signal having a system clock period. The system uses an accurate and stable reference clock signal. The system comprises a measuring circuit and a ratio counter. The measuring circuit receives and processes the system clock signal and produces a measurement, referred to as the system clock measurement, that is indicative of the system clock period. The ratio counter receives the system clock signal and the system clock measurement and generates the output clock signal. The system is resistant to noise in the output clock signal caused by asynchronicity between the system clock signal and the reference clock signal. The system is resistant because it employs at least one of a lock-on unit and a synchronizing controller in operating the clock measuring circuit. The lock-on unit suppresses updating of the system clock measurement if a new measurement differs from the old measurement by no more than a window size. The synchronizing controller assures correct synchronization in the clock measuring circuit despite the asynchronicity of the system cloc…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.